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Pré-Publication, Document De Travail Année : 2020

TSV-integrated Surface Electrode Ion Trap for Scalable Quantum Information Processing

P. Zhao
H. Y. Li
  • Fonction : Auteur
J. Tao
T. Henner
  • Fonction : Auteur
Y. D. Lim
  • Fonction : Auteur
W. W. Seit
  • Fonction : Auteur
C. S. Tan
  • Fonction : Auteur

Résumé

In this study, we report the first Cu-filled through silicon via (TSV) integrated ion trap. TSVs are placed directly underneath electrodes as vertical interconnections between ion trap and a glass interposer, facilitating the arbitrary geometry design with increasing electrodes numbers and evolving complexity. The integration of TSVs reduces the form factor of ion trap by more than 80%, minimizing parasitic capacitance from 32 to 3 pF. A low RF dissipation is achieved in spite of the absence of ground screening layer. The entire fabrication process is on 12-inch wafer and compatible with established CMOS back end process. We demonstrate the basic functionality of the trap by loading and laser-cooling single 88Sr+ ions. It is found that both heating rate (17 quanta/ms for an axial frequency of 300 kHz) and lifetime (~30 minutes) are comparable with traps of similar dimensions. This work pioneers the development of TSV-integrated ion traps, enriching the toolbox for scalable quantum computing.
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Dates et versions

hal-03091723 , version 1 (31-12-2020)

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P. Zhao, J.-P. Likforman, H. Y. Li, J. Tao, T. Henner, et al.. TSV-integrated Surface Electrode Ion Trap for Scalable Quantum Information Processing. 2020. ⟨hal-03091723⟩
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